8/27/2023 0 Comments Burnin board![]() The single most important aspect of successful memory burn-in board design is good power distribution accompanied with carefully designed decoupling and power gridding. To further reduce inductance, these traces should be as wide as room will permit.įor soundness of solder joints, design with a minimum of 50% more pad area than the PTH area (0.010″ minimum annular ring). These local decoupling capacitors should be located as close as physically possible to each chip and have the shortest possible traces from their respective power supply to ground. Layout the board for a 0.1 microfarad capacitor per DUT. Local Decoupling – to avoid high-frequencies overcomes the voltage spikes which develop on the power supply pins of the memory devices when they are turned on or off by dynamic control signals. Although solid tantalum capacitors are expensive, their cost is insignificant when compared to the value of the DUT they protect. It is important that both the capacitance and voltage ratings of solid tantalum capacitors be derated for use at 125☌, the maximum operating temperature specified by most capacitor manufacturers. Half the bulk capacitance should be placed near the point where the supplies enter the board and the other half at the far side of the DUT so the array lies between the bulk decoupling capacitors. These capacitors should be solid tantalum capacitors which have better transient response than most other large value capacitors and put more capacitance into a small package, which simplifies board layout. To assure accuracy and economy, 0.040″ minimum holes to 0.062″ thick PC boards work well.īulk Decoupling – for low frequency decoupling, use 46 to 200 microfarad capacitors between the supply voltage and common return. Respect the ratio of hole diameter to PC board thickness (1 :3 maximum). Loranger normally prefers a 0.5″ “circuit-free” zone around the entire perimeter of the PC board, save the edge finger area, for manufacturability, sharpness of the layout and mechanical attachment spacing for the framing, such as the Isolation / Support Frame.Įconomic concerns generally force our designers to consider four rules for PTH sizing: Where possible, two-sided PC boards with plated-thru holes are preferred for economy, reliability and ease-of-repair however, multi layers of 4 thru 26 layers are available. Smaller dimensions add significant cost but Loranger has produced 0.004″ traces and spaces with success. Line widths and spaces of 0.010″ can be easily obtained, however, 0.025″ minimum spaces and traces are preferred to accommodate manufacturing cost and wear concerns. However, Loranger has built boards with up to 1,000-vol differentials with consequent increased trace spacing. Generally, line spaces of a minimum 0.010″ can be maintained for differentials of less than 50V. Hence, the following is a list of design goals that should be reviewed for each layout. Each PC board design must be treated uniquely, as each layout is a combination of proper material selections, mechanical constraints and electrical wizardry.
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